Next generation power device wafer level prototyping services
Prototyping can be done with small number of substrates say, single wafer and also for a single process (Also flexible to other smaller size substrates and chips)
Features
- The substrate material can be Si, SiC, Ga2O3, diamond, etc.
- We are one-stop solution for all the processes (front electrode-P/N ion implantation-back electrode formation) for various substrates under optimal conditions.

Thin Film Deposition Process | |
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Sputtering | In addition to base metals and precious metals 120 types of materials including nitrides can be selected for front and back electrodes. |
ALD/ECR
Plasma |
Depositing thin gate insulators such as HfO2 , Al2O3 , SiO2 , TiO2 、AlON, SiON for power semiconductor devices is possible. |
CVD | CVD processes like PE-CVD, LP-CVD are possible |
High temperature・High Energy Ion Implantation Process / Activated Annealing Process | |
Ion Implantation / RTA | Capable of ion Implantation and activated annealing with optimized conditions for power semiconductor devices. Capable of handling wafer of sizes up to 6 inch dia. (chip size processing is also possible) |
Patterning Process | |
Photolithography | Aligner, stepper, E-beam Lithography can be performed based on specification |
Etching | Dry (Trench processing is possible for SiC , GaN substrates), Wet |
Key Process | |
MO-CVD | GaN and various other kinds are possible |
CMP | Slurry advice for CMP processes of GaN, SiC, etc. from substrate level to device |
Wafer Bonding | Bonding of SiC, GaN, etc. is possible |
Dicing | Dicing using special blades for SiC, GaN is possible |
Beside SiC and GaN, processing on other substrates like Ga2O3, Diamond, etc. is possible
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製品分類1 | Deposition, Photolithography, Etching |
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製品分類2 | Backside electrode |
プロセス分類 |
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サムネイル画像 |
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説明文 |
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リダイレクトURL |
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